Pre-Grant Publication Number: 20080104325
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Prior Art Detail
Summary / Description
| Summary / Description | ..a prefetch unit incorporates therein a circuit for issuing a request to read out one group of data to be prefetched and registers for holding the group of data read .. The group of data are read out from a cache memory or a main memory under the control of a cache request unit.... |
Basic Information
| Type of Prior Art | Issued Patents - US |
| Country | United States of America |
| Patent/Application # | 5721865 |
| Kind Code | United States (US) - United STATES Patent - A |
| Patentee Name | Hitachi, Ltd., Hewlett-Packard Company |
| Relevant Pages, Columns, or Lines | |
| URL | |
| Filing Date | January 18, 1996 |
| Additional Information | |
Notes / To Do
| Notes | Prior art entered on behalf of John-David Wellman. |
Excerpt
Excerpt An object of the present invention is to solve the problems of the second prior art and provide an information processing apparatus having a prefetch circuit with a higher function.
A more specific object of the present invention is to provide an information processing apparatus capable of speeding up prefetching by skillfully utilizing a cache memory in a memory such as a main memory or the like. |
Relevance
Claims
1
Relevance
Disclosed is a hardware implementation of a 'monitor agent' that provides prefetching and prefetch control.
Disclosed is a hardware implementation of a 'monitor agent' that provides prefetching and prefetch control.
Claim Chart
All
13
Relevance
Disclosed is a hardware implementation of a 'monitor agent' that provides prefetching and prefetch control.
Disclosed is a hardware implementation of a 'monitor agent' that provides prefetching and prefetch control.
Claim Chart
All
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