Pre-Grant Publication Number: 20070233761
Crossbar arithmetic processor
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#126Defect-tolerant Logic with Nanoscale Crossbar Circuits
Applies to Claims 1
Submitted by: Anand KamalLast updated: over 5 years ago
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Summary / Description
Summary / DescriptionThe application of a crossbar as an arithmetic processor (for adding binary numbers) is disclosed.
 
Basic Information
Type of Prior ArtOnline Publication
 
URLhttp://www.hpl.hp.com/research/...
 
Author/Creator
 
TitleDefect-tolerant Logic with Nanoscale Crossbar Circuits
 
Publication DateMay 25, 2004
 
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Excerpt
Excerpt
“After describing the molecular crossbar hardware, we illustrate how a simple logic gate can be implemented using a crossbar in Section 3 and show how defects affect different implementation choices. We then turn to a more interesting circuit: a binary adder. We first describe two approaches to implementing adders using crossbars, and then show their feasibilities in the face of defects. This paper thus shows how crossbar architectures can be applied to create logic circuits, even with numerous manufacturing defects.” (pp.2)
 
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Claims
1
A computing device comprising: at least one crossbar array including a first set of N conductive parallel wires (N≧2) forming a set of columns and a second set of M conductive parallel wires (M≧2) forming a set of rows, and formed so as to intersect the first set of conductive parallel wires, wherein intersections are formed between the first and second sets of wires forming M×N crosspoints wherein each of the crosspoints is programmable so as to be in a relatively high conductive state representative of a binary value 1 or a relatively low conductive state representative of a binary value 0; a programming unit configured to program the crosspoints to have one of the relatively high conductive state or the relatively low conductive state so that at least one column of the crossbar array stores a bit pattern representative of a programmed numerical value; an input unit configured to provide a bit pattern representative of an input numerical value to the columns of the crossbar array; and a post-processing unit configured to convert analog signals output from each of the rows of the crossbar array into digital output bit patterns and configured to combine the digital output bit patterns so as to form a resultant bit pattern representative of an output numerical value, wherein the output numerical value is mathematically dependent on both the programmed numerical value and the input numerical value.
Relevance
The application of a crossbar as an arithmetic processor (for adding binary numbers) is disclosed.
The application of a crossbar as an arithmetic processor (for adding binary numbers) is disclosed.
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