Pre-Grant Publication Number: 20070233761
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Prior Art (11)
Title Logic Gates and Computation from Assembled Nanowire Building Blocks
Description
The reference describes a bottom-up approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks (or crossbars). Further the reference describes that nanowire junction arrays (crossbars) have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computations.
Title Nanoscale molecular-switch crossbar circuits
Description
A crossbar memory unit with crosspoints programmable to low and high conductive states such that the crossbar array stores a bit pattern is disclosed.
Title Array-Based Architecture for Molecular Electronics
Description
We sketch a basic architecture for molecular electronics based on carbon nanotubes and silicon nanowires which can provide universal logic functionality with all logic and signal restoration operating at the molecular scale. The key properties of this architecture are its minimalism, defect tolerance, and compatibility with emerging, bottom-up, nanoscale fabrication techniques.
Title Digital Logic using Molecular Electronics
Description
A reconfigurable architecture is based on chemically-assembled electronic nanotechnology (CAEN). A molecular latch based on molecular resonant tunneling diodes (RTDs) provides I/O-isolation, voltage restoration, and high fan-out. Moreover, a nanoblock based on CAEN has been used to implement a AND, OR, XOR gate to achieve computational objectives.
Title The CMOS/Nano Interface from a Circuits Perspective
Description
The publication describes crossbar based nanoelectronics, CMOS/nano interface and CMOS interface circuitry. The publication further describes simulation of crossbar nano circuitry having logic and arithmetic implementations.
Title Evolution in Materio: Exploiting the Physics of Materials for Computation
Description
The idea of using an array of programmable resistances to perform mathematical operations is disclosed.
Title Defect-tolerant Logic with Nanoscale Crossbar Circuits
Description
The application of a crossbar as an arithmetic processor (for adding binary numbers) is disclosed.
Title Defect-tolerant Logic with Nanoscale Crossbar Circuits
Description
The application of a crossbar as an arithmetic processor (for adding binary numbers) is disclosed.
Patent/Application # US 2005/0258872 A1
Description
An architecture for computing includes nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances.
Patent/Application # US5010505
Description
The US granted patent describes an optical crossbar arithmetic/logic technique for logic and arithmetic operations.
#122 POINT CONTACT ARRAY, NOT CIRCUIT, AND ELECTRONIC CIRCUIT COMPRISING THE SAME
Applies to Claims 1
Patent/Application # EP1331671A1
Description
The publication discloses a computing device for performing arithmetical operations, using an array of programmable resistances.
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