View Prior Art for Claim 00009
The computing device of Claim 1, wherein a plurality of the columns of the at least one crossbar array each stores a separate programmed numerical value and the output numerical value is a sum of a selected subset of the programmed numerical values wherein the selected subset is dependent on the input numerical value. Annotations(0) #124Architecture and methods for computing with reconfigurable resistor crossbars Applies to Claims 1,11,12,16,17,18,19,2,6,7,9 Submitted by: Sandeep SharmaLast updated: over 5 years ago
Patent/Application # US 2005/0258872 A1
An architecture for computing includes nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances.
Title Nanoscale molecular-switch crossbar circuits
A crossbar memory unit with crosspoints programmable to low and high conductive states such that the crossbar array stores a bit pattern is disclosed.
Title Logic Gates and Computation from Assembled Nanowire Building Blocks
The reference describes a bottom-up approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks (or crossbars). Further the reference describes that nanowire junction arrays (crossbars) have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computations.