An architecture for computing includes nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances.

A crossbar memory unit with crosspoints programmable to low and high conductive states such that the crossbar array stores a bit pattern is disclosed.

The reference describes a bottom-up approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks (or crossbars). Further the reference describes that nanowire junction arrays (crossbars) have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computations.