Pre-Grant Publication Number: 20070174746
Filing Date: December 20, 2005
Inventors: Juerg Haefliger, William Bruckert, James Klecka
Assignee: HEWLETT PACKARD COMPANY
Current U.S. Classification: 714, 714/721000
View Prior Art for Claim 00008
A computer readable medium having instructions for causing a computer to execute a method, comprising:
lowering a core voltage of one of two processors executing instructions in synchronization to determine a first voltage value;
raising the core voltage of the one processor to determine a second voltage value; and
using the first and second voltage values to tune the core voltage of the one processor to increase performance of the two processors.
Title Computer
ISBN
Description
A codesign methodology incorporates timing speculation into a low-power micropocessor pipeline and shaves energy levels far below the point permitted by worst-case computation paths
Title A Low-Power Microcontroller with On-Chip Self-Tuning Digital Clock-Generator for Variable-Load Appl
ISBN
Description
This paper describes a processor, controller, and machine readable description for processor tuning. It is tuning clock speed at constant voltage, but this would be commonly recognized to pertain to voltage tuning at constant speed.
